Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems

In this paper, we propose a set of rules for consistent estimation of the r eal performance and power features of the flip-flop and master-slave latch structures. A new simulation and optimization approach is presented, target ing both high-performance and power budget issues, The analysis approach re veals the sources of performance and power-consumption bottlenecks in diffe rent design styles. Certain misleading parameters have been properly modifi ed and weighted to reflect the real properties of the compared structures. Furthermore, the results of the comparison of representative master-slave l atches and flip-flops illustrate the advantages of our approach and the sui tability of different design styles for high-performance and low-power appl ications.