DIVA: Dual-issue VLIW architecture with media instructions for image processing

According to the demand on enormous multimedia data processing, we have des igned a VLIW (Very Long Instruction Word) processor called DIVA (Dual-Issue VLIW Architecture) exploiting the ILP (instruction-level parallelism) in m ultimedia programs. DIVA processor which can execute two instructions in on e cycle supports 86 instructions including 30 media instructions, and has a sub-word execution structure that supports the saturation mode arithmetic for image processing. Compared to scalar architectures without media instru ctions, the performance of the DIVA processor is improved by 2.2 to 5 times due to the combination of VLIW architecture and media instructions. DIVA p rocessor, consisting of about 90,000 gates, was implemented using 0.6 mu m CMOS SOG (Sea-of-Gate) process on 8 mm X smm die, and has shown a performan ce of 80 MOPS (Million Operations Per Second) at 10 MHz clock frequency.