Analysis and optimization of floating body cell operation for high-speed SOI-DRAM

It is confirmed by simulation that SOI-DRAMs can be operated at high speed by using the floating body structures. Several floating body effects are an alyzed. It is described that the dynamic retention characteristics are not dominated by capacitive coupling and hole redistribution. And it is describ ed that those characteristics are determined by the leakage current in the small pn-junction region of the floating body. Reducing pn junction leakage current is important for realizing a long retention time. If the pn juncti on leakage is suppressed to 10(-18) A/mu m, a dynamic retention time of 520 sec at a V-BSG of 0.5 V can be achieved at 27 degrees C. On those conditio ns, the refresh current of SOI-DRAMs is reduced by 54% compared with bulk-S i DRAMs.