POTENTIAL DISTRIBUTION AND INTERFACE STATES IN THE INPUT STAGE OF AN AMORPHOUS-SILICON THIN-FILM-TRANSISTOR

Some properties of the input stage of an amorphous Si (a-Si) thin-film transistor have been studied on an analogous large-area a-Si-a-SiN st ructure which mimicked the overlap region between source and gate in a real device. Audio-frequency capacitance-voltage techniques were used between 170 and 380 K to deduce internal parameters of the system. Wh en the gate was positively biased, thick a-Si layers were found to lea d to an internal barrier whose properties could be reliably quantified using capacitance and equivalent series resistance measurements. Stud ies of the parallel conductance of the devices showed that, for a forw ard gate bias, significant losses resulting from charge injected into the nitride gate insulator could be detected whereas, for a reverse bi as, loss associated with states at the a-Si-a-SiN interface was observ ed. Most unusually, this loss had an activated temperature dependence. The most likely mechanism to account for this loss is charging of int erface states by tunnelling. A novel relaxation model is introduced to describe such a process, which is in reasonable agreement with the ex perimental data.