This article presents the design principles for implementing low-power
wireless video systems through the use of two examples, a single-chip
digital video camera and a wireless video-on-demand system. The discu
ssion will focus on the architectural and circuit techniques developed
specifically for silicon integration of high-performance low-power wi
reless video systems. The proposed single-chip digital camera incorpor
ates a parallel architecture to perform MPEG-2 encoding in real time,
while the video-on-demand system employs an error-resilient compressio
n algorithm to guard against the transmission errors often encountered
in wireless communication. Both wireless video systems, one for encod
ing and the other for decoding, dissipate only tens of milliwatts of p
ower, achieving a power reduction two orders of magnitude below standa
rd solutions.