EXPLOITING IDLE FLOATING-POINT RESOURCES FOR INTEGER EXECUTION

Citation
Ss. Sastry et al., EXPLOITING IDLE FLOATING-POINT RESOURCES FOR INTEGER EXECUTION, ACM SIGPLAN NOTICES, 33(5), 1998, pp. 118-129
Citations number
28
Categorie Soggetti
Computer Science Software Graphycs Programming","Computer Science Software Graphycs Programming
Journal title
Volume
33
Issue
5
Year of publication
1998
Pages
118 - 129
Database
ISI
SICI code
Abstract
In conventional superscalar microarchitectures with partitioned intege r and floating-point resources, all floating-point resources are idle during execution of integer programs. Palacharla and Smith [26] addres sed this drawback and proposed that the floating-point subsystem be au gmented to support integer operations. The hardware changes required a re expected to be fairly minimal. To exploit these idle floating resou rces, the compiler must identify integer code that can be profitably o ffloaded to the augmented floating-point subsystem. In this paper, we present two compiler algorithms to do this. The basic scheme offloads integer computation to the floating-point subsystem using existing pro gram loads/stores for inter-partition communication. For the SPECINT95 benchmarks, we show that this scheme offloads from 5% to 29% of the t otal dynamic instructions to the floating-point subsystem. The advance d scheme inserts copy instructions and duplicates some instructions to further offload computation. We evaluate the effectiveness of the two schemes using timing simulation. We show that the advanced scheme can offload from 9% to 41% of the total dynamic instructions to the float ing-point subsystem. In doing so, speedups from 3% to 23% are achieved over a conventional microarchitecture.