A 1 GHz image-rejection down-converter implemented in 0.8 mu m CMOS pr
ocess is presented. The down-converter consists of a quadrature genera
tor and mixers. The proposed architecture has the characteristic of im
age-rejection insensitive to phase error of the higher frequency first
local oscillator(LO). The down-converter has image-rejection characte
ristic of 29.3dB under 2 degrees phase error of the lower frequency se
cond LO, The down-converter dissipates 108mW at 3.3V supply.