A NOVEL HIERARCHICAL-SEARCH BLOCK MATCHING ALGORITHM AND VLSI ARCHITECTURE CONSIDERING THE SPATIAL COMPLEXITY OF THE MACROBLOCK

In this paper, we propose a novel hierarchical-search block matching a lgorithm for motion estimation, which adaptively selects an initial se arch level based on the spatial complexity of a matching block. It rel ies on a simple computation of pixel intensity variation in the curren t macroblock. We demonstrate its effectiveness in two aspects: the per formance and the computational cost. A hardware architecture and a VLS I realization of this algorithm with half-pel motion estimation and mo tion compensation are also presented. The proposed algorithm greatly r educes the computations required in the existing hierarchical-search b lock matching algorithms while achieves virtually identical performanc e to them.