Effects of irradiation and annealing temperature on radiation-induced
charge trapping are explored for MOS transistors, Transistors were irr
adiated with 10-keV x rays at temperatures from -25 to 100 degrees C a
nd annealed at 100 degrees C for times up to 3.6x10(6) s. Transistor d
ata were analyzed for the contributions of radiation-induced charge du
e to oxide traps, border traps, and interface traps. Increased irradia
tion temperature resulted in increased interface-trap and border-trap
buildup and decreased oxide-trapped charge buildup during irradiation.
Interface-trap buildup immediately following irradiation for transist
ors irradiated at 100 degrees C was equivalent to the buildup of inter
face traps in transistors irradiated at 27 degrees C and annealed for
one week at 100 degrees C (standard rebound test). For the p-channel t
ransistors, a one-to-one correlation was observed between the increase
In interface-trap charge and the decrease in oxide-trapped charge dur
ing irradiation. This may imply a link between increased interface-tra
p buildup and the annealing of oxide-trapped charge in these devices.
The observed data can be explained in terms of increased hydrogen ion
transport rates to the Si/SiO2, interface during elevated temperature
irradiations. These results have implications on hardness assurance te
sting and potentially may be used to reduce costs associated with rebo
und qualification.