TOTAL-DOSE HARDNESS OF 3 COMMERCIAL CMOS MICROELECTRONICS FOUNDRIES

Citation
Jv. Osborn et al., TOTAL-DOSE HARDNESS OF 3 COMMERCIAL CMOS MICROELECTRONICS FOUNDRIES, IEEE transactions on nuclear science, 45(3), 1998, pp. 1458-1463
Citations number
9
Categorie Soggetti
Nuclear Sciences & Tecnology","Engineering, Eletrical & Electronic
ISSN journal
00189499
Volume
45
Issue
3
Year of publication
1998
Part
3
Pages
1458 - 1463
Database
ISI
SICI code
0018-9499(1998)45:3<1458:THO3CC>2.0.ZU;2-P
Abstract
We have measured the effects of total ionizing dose (TID) on CMOS FETs , ring oscillators and field-oxide transistor test structures fabricat ed at three different commercial foundries with four different process es. The foundries spanned a range of integration levels and included H ewlett-Packard (HP) 0.5 mu m and 0.8 mu m processes, an Orbit 1.2 mu m process, and an AMI 1.6 mu m process. We found that the highest toler ance to TID was for the HP 0.5 mu m process, where the shift in NMOS t hreshold voltage was less than 40 mV at 300 krad. An examination of th e dependence of the threshold voltage shift on gate oxide thickness in dicated that oxides of the different commercial processes were of simi lar quality, and that the improvement in the total dose tolerance of t he KP 0.5 mu m technology is associated with the scaling of the gate o xide. Measurements on field-oxide transistors from the HP 0.5 mu m pro cess were shown not to invert for signal voltages at 300 krad, maintai ning the integrity of the LOGOS isolation. The impact of these results is discussed in terms of the potential insertion of commercial microe lectronics into space systems.