STUDIES ON SILICON ETCHING USING THE CONFINED ETCHANT LAYER TECHNIQUE

Citation
Yb. Zu et al., STUDIES ON SILICON ETCHING USING THE CONFINED ETCHANT LAYER TECHNIQUE, Electrochimica acta, 43(12-13), 1998, pp. 1683-1690
Citations number
15
Categorie Soggetti
Electrochemistry
Journal title
ISSN journal
00134686
Volume
43
Issue
12-13
Year of publication
1998
Pages
1683 - 1690
Database
ISI
SICI code
0013-4686(1998)43:12-13<1683:SOSEUT>2.0.ZU;2-L
Abstract
Silicon surface etching in HBr solutions using the confined etchant la yer technique (CELT) as well as scanning electrochemical microscopy (S ECM) has been carried out and comparison between the two methods has b een made in terms of the etching resolution. It has been shown that th e lateral diffusion of the etchant in SECM configuration can be suppre ssed in CELT by a homogeneous scavenging reaction and thus the etching resolution of surface, especially for those with slow etching rate su ch as Si can be improved. H3AsO3 was added to the solution containing HBr which reacts; rapidly and homogeneously with the electrogenerated bromine, resulting in a very thin bromine diffusion layer surrounding the tip. The size of the etching spot at the Si wafer surface obtained using the CELT matches that of the tip very well. (C) 1998 Elsevier S cience Ltd. All rights reserved.