A SIMULATION STUDY ON LOT RELEASE CONTROL, MASK SCHEDULING, AND BATCHSCHEDULING IN SEMICONDUCTOR WAFER FABRICATION FACILITIES

Citation
Yd. Kim et al., A SIMULATION STUDY ON LOT RELEASE CONTROL, MASK SCHEDULING, AND BATCHSCHEDULING IN SEMICONDUCTOR WAFER FABRICATION FACILITIES, Journal of manufacturing systems, 17(2), 1998, pp. 107-117
Citations number
25
Categorie Soggetti
Engineering, Manufacturing","Operatione Research & Management Science","Engineering, Industrial
ISSN journal
02786125
Volume
17
Issue
2
Year of publication
1998
Pages
107 - 117
Database
ISI
SICI code
0278-6125(1998)17:2<107:ASSOLR>2.0.ZU;2-S
Abstract
This paper focuses on production scheduling in semiconductor wafer fab rication. Included in this study are decision problems of lot release control (to determine the time and quantity of wafers to release into the wafer fab), mask scheduling (to determine the time to change masks in photolithographic expose workstations), and batch scheduling (to d etermine the number of lots to be produced simultaneously in a batch a nd the processing sequence of batches in front of batch processing wor kstations such as cleaning and oxidation workstations). Unlike previou s research, in which these three problems are dealt with separately th e three problems are considered simultaneously using simulation, and n ew rules for the three problems are suggested in this study. Moreover, the setup time (mask change time) and the processing time were consid ered separately in the photolithographic expose workstations. Simulati on results snow that the new rules give better performance than existi ng rules with respect to throughput rate, flow time, and work-in-proce ss inventory.