J. Wang et al., CREEP-BEHAVIOR OF A FLIP-CHIP PACKAGE BY BOTH FEM MODELING AND REAL-TIME MOIRE INTERFEROMETRY, Journal of electronic packaging, 120(2), 1998, pp. 179-185
In this paper, the creep behavior of a flip-chip package under a therm
al load was investigated by using nonlinear finite element technique c
oupled with high density laser moire interferometry. The real-time moi
re interferometry technique was used to monitor and measure the time-d
ependent deformation of flip-chip packages during the rest, while the
finite element method was adapted to analyze the variation of stresses
at edges and corners of interfaces with time by considering the visco
elastic properties of the underfill and the viscoplastic behavior of t
he solder balls. The results show that the creep behavior of the under
fill and the solder balls does not have significant effect on the warp
age of the flip-chip under the considered thermal load due to their co
nstrained small volume. The variation of the time-dependent deformatio
n in the flip-chip package caused by the creep behavior of the underfi
ll and the solder balls is in the submicro scale. The maximum steady-s
tate U-displacement is only reduced by up to 6.7 percent compared with
the maximum initial state U-displacement. Likewise, the maximum stead
y-state V-displacement is merely reduced by up to 10 percent compared
with the maximum initial state V-displacement. The creep behavior slig
htly weakens the warpage situation of the flip-chip package. However,
the modeling results show that the localized stresses at corners and e
dges of interfaces greatly decrease due to the consideration of viscoe
lastic properties of the underfill and the viscoplastic properties of
the solder balls, and, thereby, effectively preventing interfaces from
cracking, in addition, the predicted deformation values of the flip-c
hip package obtained from the finite element analysis were compared wi
th the test data obtained from the laser moire interferometry techniqu
e. It is shown that the deformation values of the flip-chip package pr
edicted from the finite element analysis are in a fair agreement with
those obtained from the test.