A 15-B RESOLUTION 2-MHZ NYQUIST RATE DELTA-SIGMA ADC IN A 1-MU-M CMOSTECHNOLOGY

A high-resolution high-speed fourth-order cascaded Delta Sigma analog- to-digital converter, based on a 2-1-1 topology, is presented, The con verter is implemented with fully differential switched capacitor circu its in a standard 1-mu m CMOS technology, The converter uses two symme trical reference voltages of 1 V, and is driven by a single 48-MHz clo ck signal. With an oversampling ratio of only 24, the converter achiev es a resolution of 91 dB, a peak SNR of 90 dB, and a peak SNDR of 85 d B at a Nyquist rate of 2 MHz after comb filtering. The power consumpti on of the converter is 230 mW, from a single 5-V supply voltage.