A NEW LOW-POWER GAAS 2-SINGLE-PORT MEMORY CELL

This paper describes an experimental static memory cell in GaAs MESFET technology. The memory cell has been implemented using a mix of sever al techniques already published in order to overcome some of their pri ncipal drawbacks related to ground shifting, destructive readout, and leakage current effects, The cell size is 36 x 37 mu m(2) using a 0.6- mu m technology. An experimental 32 word x 32 bit array has been desig ned. From simulation results, an address access time of 1 ns has been obtained. A small 8 word x 4 bit protoype was fabricated. The cell can be operated at the single supply voltage from I up to 2 V, The evalua tion is provided according to the functionality and power dissipation. Measured results show a total current consumption of 14 mu A/cell whe n operated at 1 V.