A FAST SCHEDULING ALGORITHM-BASED ON GRADUAL TIME-FRAME REDUCTION FORDATAPATH SYNTHESIS

This paper proposes a fast scheduling algorithm based on gradual lime- frame reduction for datapath synthesis of digital signal processing ha rdwares. The objective of the algorithm is to minimize the costs for f unctional units and registers and to maximize connectivity under given computation time and initiation interval. Incorporating the connectiv ity in a scheduling stage can reduce multiplexer counts in resource bi nding. The algorithm maximizes connectivity with maintaining low time complexity and obtains datapath designs with totally small hardware co sts in the high-level synthesis environment. The algorithm also resolv es inter-iteration data dependencies and thus realizes pipelined datap aths. The experimental results demonstrate that the proposed algorithm reduces the multiplexer counts after resource binding with maintainin g low costs for functional units and registers compared with eight con ventional schedulers.