CVD-AL PVD-AL INTEGRATION FOR ADVANCED VIA AND INTERCONNECT TECHNOLOGY

A metallization process that can fill the ever-shrinking vias and form the interconnect at the same time is highly desirable. An integrated Al plug and interconnect process offers advantages of improved electri cal performance, and reduced cost of ownership through process simplif ication for 0.25 mu m and beyond. In this report, an enabling technolo gy that integrates Al deposited by chemical vapor deposition (CVD) wit h an overlayer of sputtered AlCu is discussed. The ability to deposit in-situ sequential layers without a vacuum break was a key factor in d eveloping a technology for consistent void-free fill of sub-0.25 mu m structures. This approach has resulted in a low resistivity (similar t o 3 mu Omega cm), low temperature (< 380 degrees C) via fill process w ith copper doping of CVD Al. Sub-0.2 mu m via/contact fill with aspect ratio greater than 4 was achieved. This technology was integrated in a two-level 0.35 mu m design rule with conventional BEOL processing. A better than 2x improvement in via resistance was achieved compared to W technology. No problems were encountered with oxide CMP, photolitho graphy or metal etch. Data on via fill capability and electrical perfo rmance of the integrated CVD Al/PVD AlCu process is presented. Studies on copper doping of CVD Al are discussed. Investigation of morphology and texture dependence on wetting layer for CVD Al is reported. (C) 1 998 Elsevier Science S.A. All rights reserved.