In 1998 the CLEO detector collecting data at the CESR storage ring wil
l be upgraded. A new Data Acquisition system will be installed during
the upgrade to record triggers up to 1000 Hz with a mean data size of
25 KBytes per event. In this largely improved system, we will exploit
the new CBLT VME transfer mode (defined by VIPA) to readout crates wit
h about 15 9U digitization cards. Secondly, we decided to design and b
uild a FASTBUS-VME interface card with the dimension of a FASTBUS card
, and a 2-slot VME backplane inside. With this interface, all hardware
and software will be homogeneous at this point of the DAQ data pipeli
ne. It will also perform additional sparsification and channel tagging
''on the fly''. This new system will be monitored and controlled by a
networked system of CPUs. To achieve a dynamical and simple connectio
n method between the various processes we chose the CORBA standard com
munication method. The port to PowerPC based VME boards was done in cl
ose collaboration with Visigenic Corp. (C) 1998 Elsevier Science B.V.