VERIFY HARDWARE IN A LOGIC SIMULATION ENVIRONMENT

Authors
ANDREWS J
Citation
J. Andrews, VERIFY HARDWARE IN A LOGIC SIMULATION ENVIRONMENT, Electronic design, 46(15), 1998, pp. 89
Citations number
NO
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronic design → ACNP
ISSN journal
00134872
Volume
46
Issue
15
Year of publication
1998
Database
ISI
SICI code
0013-4872(1998)46:15<89:VHIALS>2.0.ZU;2-H