LOW-ENERGY BORON IMPLANTATION IN SILICON AND ROOM-TEMPERATURE DIFFUSION

In the semiconductor industry Complementary Metal Oxide Semiconductor Technology is the main stream. The continuing trend towards reduction of the transistor gate length allows for more complex integrated circu its. This puts stringent demands on other transistor properties such a s source and drain junction depth. Source and drain are formed using i on implantation. For transistors where source and drain are boron-dope d very low implantation energies are needed to obtain shallow implanta tion profiles. We have characterized boron implants, concentrating on the 100 eV to 1 keV energy range. As-implanted and annealed implant pr ofiles are presented together with an overview of electrical activatio n and sheet resistance showing that ion implantation is a viable techn ique for shallow source/drain formation. In this paper some of the mec hanisms underlying the formation of implantation profiles are discusse d. Using a deactivation technique, we have measured the room temperatu re silicon self-interstitial diffusivity, D-I. It was found to be at l east 10(-7) cm(2) s(-1). This appears to be a new record experimental value, approaching theoretical values for the silicon di-interstitial. Room temperature migration and clustering behaviour of implanted boro n has been investigated by performing ion implantation of the boron is otope B-11 into Molecular Beam Epitaxy-grown in situ doped layers. We, for the first time, show that a fraction of the implanted boron migra tes deep into the bulk of the Si with substitutional B-10 acting as tr ap centers for migrating B-11. (C) 1998 Elsevier Science B.V.