The development towards lower voltages and even ultra-low power (ULP)
technologies [J.B. Burr, Symposium Record, Hot Chips V, 1993, pp. 7.4.
1-7.4.12; D. Liu, Ch. Svensson, IEEE J. Solid State Circuits 28(1)(199
3) 10-17; G. Schrom et al., 24th European Solid State Device Research
Conference-ESSDERC'94, 1994, pp. 679-682] makes ever higher demands on
compact device model accuracy. We present a new approach to dynamic M
OSFET modeling, which is especially suited for the simulation of low-v
oltage mixed analog digital circuits. The model is based on the interp
olation of terminal charges and conductive currents which are determin
ed from transient current/voltage data which can be obtained through m
easurement or simulation of the devices. Using this model, a variety o
f analog and digital circuits was simulated, and selected results were
verified against device-level circuit simulations. (C) 1998 Elsevier
Science Ltd. All rights reserved.