DESIGN OF KNOCKOUT CONCENTRATORS

The knockout switch architecture has been found attractive for large-s cale switch implementations because of its satisfactory cell loss perf ormance, with constant output buffer speed-up independent of switch di mension. The per port hardware complexity of a knockout concentrator, however, does grow linearly with the switch dimension. In the paper, s everal approaches are investigated to reduce the complexity of the kno ckout while retaining the cell loss performance. A bufferless hierarch ical concentrator architecture with reduced hardware complexity is der ived. The concentrator complexity can be further reduced by introducin g buffers in the concentrator, and the trade-off is analysed. Furtherm ore, output grouping may be applied in the buffered hierarchical conce ntrator to reduce the per port complexity. Two large-scale switch desi gn examples are derived using the proposed design approaches, producin g a complexity reduction ranging from 1.2% to 89.7%.