BYTE SYNCHRONIZATION SYSTEM AND METHOD USING AN ERROR-TOLERANT SYNCHRONIZATION PATTERN FOR THE PR-IV CHANNEL

Citation
T. Yasuda et al., BYTE SYNCHRONIZATION SYSTEM AND METHOD USING AN ERROR-TOLERANT SYNCHRONIZATION PATTERN FOR THE PR-IV CHANNEL, IEEE transactions on magnetics, 34(4), 1998, pp. 1922-1924
Citations number
6
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
ISSN journal
00189464
Volume
34
Issue
4
Year of publication
1998
Part
1
Pages
1922 - 1924
Database
ISI
SICI code
0018-9464(1998)34:4<1922:BSSAMU>2.0.ZU;2-O
Abstract
The probability of byte synchronization failure for a Viterbi detector in a partial-response class IV (PR IV) system with an additive white Gaussian noise (AWGN) is analyzed. The error rate of the Viterbi detec tor is computed as a function of the combination of two critical incor rect samples, which is then related to the signal-to-noise ratio (SNR) of the samples. New error-tolerant byte-synchronization patterns (ETB SP) and detection circuitry for the partial-response maximum-likelihoo d (PRML) channel are introduced. The length of the new patterns is 1/3 shorter than the conventional ones, and the probability of failure is four orders of magnitude lower. The complexity of the circuitry is ha lved by introducing a new vector subtracter and a new offset adder.