DESIGN AND IMPLEMENTATION OF THE PAPRICA PARALLEL ARCHITECTURE

Citation
A. Broggi et al., DESIGN AND IMPLEMENTATION OF THE PAPRICA PARALLEL ARCHITECTURE, Journal of VLSI signal processing, 19(1), 1998, pp. 5-18
Citations number
27
Categorie Soggetti
Computer Science Information Systems","Engineering, Eletrical & Electronic","Computer Science Information Systems
ISSN journal
13875485
Volume
19
Issue
1
Year of publication
1998
Pages
5 - 18
Database
ISI
SICI code
1387-5485(1998)19:1<5:DAIOTP>2.0.ZU;2-1
Abstract
In this paper PAPRICA, a massively parallel coprocessor devoted to the analysis of bitmapped images is presented considering first the compu tational model, then the architecture and its implementation, and fina lly the performance analysis. The main goal of the project was to deve lop a subsystem to be attached to a standard workstation and to operat e as a specialized processing module in dedicated systems. The computa tional model is strongly related to the concepts of mathematical morph ology, and therefore the instruction set of the processing units imple ments basic morphological transformations. Moreover, the specific proc essor virtualization mechanism allows to handle and process multiresol ution data sets. The actual implementation consists of a mesh of 256 s ingle bit processing units operating in a SIMD style and is based on a set of custom VLSI circuits. The architecture comprises specific hard ware extensions that significantly improved performances in real-time applications.