DEVELOPMENT OF A DETECTOR-COMPATIBLE JFET TECHNOLOGY ON HIGH-RESISTIVITY SILICON

We report on the development of a radiation-detector compatible JFET t echnology on high-resistivity silicon for monolithic integration of de tectors and front-end electronics. A dedicated test-chip has been desi gned and fabricated for process and device characterization. Results f rom the electrical characterization of a first fabrication run show th at good values of detector leakage current (approximate to 1 nA/cm(2)) can be obtained in spite of the relatively high thermal budget charac terizing the process. As far as the JFET performance is concerned, a p roblem of insufficient device isolation at high substrate voltages has been evidenced. A second run is currently being carried on with the a im of optimizing the JFET structure. (C) 1998 Elsevier Science B.V. Al l rights reserved.