THE RAD-HARD READOUT SYSTEM OF THE BABAR SILICON VERTEX TRACKER

This paper discusses the behaviour of a prototype rad-hard version of the chip developed for the readout of the BaBar silicon vertex tracker . A previous version of the chip, implemented in the 0.8 mu m HP rad-s oft version has been thoroughly tested in the recent times. It feature d outstanding noise characteristics and showed that the specifications assumed as target for the tracker readout were met to a very good ext ent. The next step was the realization of a chip prototype in the rad- hard process that will be employed in the actual chip production. Such a prototype is structurally and functionally identical to its rad-sof t predecessor. However, the process parameters being different, and no t fully mastered at the time of design, some deviations in the behavio ur were to be expected. The reasons for such deviations have been iden tified and some of them were removed by acting on the points that were left accessible on the chip. Other required small circuit modificatio ns that will not affect the production schedule. The tests done so far on the rad-hard chip have shown that the noise behaviour is very clos e to that of the rad-soft version, that is fully adequate for the vert ex detector readout. (C) 1998 Elsevier Science B.V. All rights reserve d.