COMPILATION OF PROCESS ALGEBRA EXPRESSIONS INTO DELAY-INSENSITIVE CIRCUITS

Citation
Cr. Jesshope et al., COMPILATION OF PROCESS ALGEBRA EXPRESSIONS INTO DELAY-INSENSITIVE CIRCUITS, IEE proceedings. Part E. Computers and digital techniques, 140(5), 1993, pp. 261-268
Citations number
9
Categorie Soggetti
Computer Sciences","Computer Applications & Cybernetics
ISSN journal
01437062
Volume
140
Issue
5
Year of publication
1993
Pages
261 - 268
Database
ISI
SICI code
0143-7062(1993)140:5<261:COPAEI>2.0.ZU;2-3
Abstract
The main advantage of delay-insensitive design of circuits is that it ensures that circuits function correctly independently of delays in th eir components and wires. Timing constraints do not have to be conside red, which facilitates top-down design. Process algebras provide a sui table formalism for specification, design and verification of concurre nt systems, but there are few methods for practical compilation of ele ctronic circuits using these algebras. The paper illustrates such a me thod for the compilation of algebraic expressions to delay-insensitive circuits. Compilation if facilitated by the use of two new forms of t he decision wait element. The implementation of these elements is also examined.