RAPID HARDWARE PROTOTYPING ON RPM-2

Authors
DUBOIS M JEONG J SONG YH MOGA A
Citation
M. Dubois et al., RAPID HARDWARE PROTOTYPING ON RPM-2, IEEE design & test of computers, 15(3), 1998, pp. 112-118
Citations number
12
Categorie Soggetti
Computer Science Hardware & Architecture","Computer Science Hardware & Architecture
Journal title
IEEE design & test of computers → ACNP
ISSN journal
07407475
Volume
15
Issue
3
Year of publication
1998
Pages
112 - 118
Database
ISI
SICI code
0740-7475(1998)15:3<112:RHPOR>2.0.ZU;2-B
Abstract
Hardware emulation using FPGAs is an intermediate approach between sof tware simulation and hardware prototyping, The RPM-2 multiprocessor em ulator uses this approach to achieve much greater flexibility and obse rvability at less cost than typical hardware prototypes.