OPTIMIZATION OF MUTUAL AND SIGNATURE TESTING SCHEMES FOR HIGHLY CONCURRENT SYSTEMS

Signature-based techniques are well known for the Built-in Self-test o f integrated systems. We propose a novel test architecture which uses a judicious combination of mutual testing and signature testing to ach ieve low test area overhead, low aliasing probability and low test app lication time. The proposed architecture is powerful for testing highl y concurrent systems in applications such as iterative logic arrays, r eal-time systems, systolic arrays, and low-latency pipelines which ten d to have a large number of functional modules of a similar nature. Th e use of mutual testing helps in testing ''self-loop'' modules which c annot be tested using simple signature-based schemes. We provide graph -theoretic optimization algorithms to optimize the test area and test application time of the resulting test architecture.