POWER ESTIMATION UNDER USER-SPECIFIED INPUT SEQUENCES AND PROGRAMS

We describe an approach to estimate the average power dissipation in s equential logic circuits under user-specified input sequences or progr ams. This approach will aid the design of programmable controllers or processors, by enabling the estimation of the power dissipated when th e controller or processor is running specific application programs. Cu rrent approaches to sequential circuit power estimation are limited by the fact that the input sequences to the sequential circuit are assum ed to be uncorrelated. In reality, the inputs come from other sequenti al circuits, or are application programs. In this paper we show how us er-specified sequences and programs can be modeled using a finite stat e machine, termed an input-modeling finite state machines or IMFSM. Po wer estimation can be carried out using existing sequential circuit po wer estimation methods on a cascade circuit consisting of the IMFSM an d the original sequential circuit.