VEHICULAR SPEED RESPONSE PHASE-LOCKED LOOP

Citation
M. Hamamura et S. Tachikawa, VEHICULAR SPEED RESPONSE PHASE-LOCKED LOOP, Electronics and communications in Japan. Part 3, Fundamental electronic science, 81(11), 1998, pp. 45-55
Citations number
11
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
10420967
Volume
81
Issue
11
Year of publication
1998
Pages
45 - 55
Database
ISI
SICI code
1042-0967(1998)81:11<45:VSRPL>2.0.ZU;2-S
Abstract
A novel circuit called a vehicular speed response phase-locked loop (V SR-PLL) is proposed. By using the speed information adaptively, the ci rcuit can remove a steady-state frequency offset which arises in direc tive antenna systems on fading channels. The performance analysis is b ased on the power loss and the irreducible bit-error rate due to the f requency offset and random FM in coherent detectors. Three kinds of sy stems are defined (a-system: omnidirectional antenna system with conve ntional PLL, b-system: directive antenna system with conventional PLL, c-system: directive antenna system with VSR-PLL, that is, the propose d system) and are compared. The advantages of VSR-PLL, especially when directive antennas are set in the direction of motion of the mobile u nit, are shown. (C) 1998 Scripta Technica.