We present a method for automating the creation of complementary-metal
-oxide-semiconductor (CMOS) integrated circuits that successfully util
izes a large number of area-distributed pads for input-output communic
ation. This method uses Duet Technologies' EPOCH computer-aided-design
tool for automated placement and routing of CMOS circuitry, given a s
chematic netlist as an input. The novelty of this approach is that it
uses Duet Technologies' EGGO program to place and route area-pad signa
ls. To verify this methodology, it is applied to the design of a digit
al signal-processing circuit, with 200 optical area-pad input-outputs
and 44 perimeter-pad input-outputs, that is being fabricated with Bell
Labs 1997 CMOS-multiple-quantum-well foundry. The layout results are
as good as or better than the results obtained by manual layout. (C) 1
998 Optical Society of America.