B. Madhavan et Afj. Levi, 55.0GBIT CM DATA BANDWIDTH DENSITY INTERFACE IN 0.5-MU-M CMOS FOR ADVANCED PARALLEL OPTICAL INTERCONNECTS/, Electronics Letters, 34(19), 1998, pp. 1846-1847
The authors demonstrate that low cost 0.5 mu m CMOS technology may be
used to form a bridge between a slow parallel electrical interface and
a very high-speed parallel optical interface. The 1cm wide integrated
circuit produced has a bisection data bandwidth of 55Gbit/s and dissi
pates 5.7W.