BREAKING THE 2N-BIT CARRY PROPAGATION BARRIER IN RESIDUE TO BINARY CONVERSION FOR THE [2(N)-1, 2(N), 2(N)+1] MODULA SET

This brief presents a high speed realization of a residue to binary co nverter for the {2(n-1),2(n),2(n) + 1} moduli set, which improves upon the best known implementation by almost twice in terms of overall con version delay. This significant speedup is achieved by using just thre e extra two input logic gates. Interestingly, by exploiting certain sy mmetry in operands, we also reduce the hardware requirement of the bes t known implementation by n - 1 full adders. Finally, the proposed con verter eliminates the redundant representation of zero using no extra logic.