Demonstration and architectural analysis of complementary metal-oxide semiconductor/multiple-quantum-well smart-pixel array cellular logic processorsfor single-instruction multiple-data parallel-pipeline processing

We present an optoelectronic-VLSI system that integrates complementary meta l-oxide semiconductor/multiple-quantum-well smart pixels for high-throughpu t computation and signal processing. The system uses 5 x 10 cellular smart- pixel arrays with intrachip electrical mesh interconnections and interchip optical point-to-point interconnections. Each smart pixel is a fine grain m icroprocessor that executes binary image algebra instructions. There is one dual-rail optical modulator output and one dual-rail optical detector inpu t in each pixel. These optical input-output arrays provide chip-to-chip opt ical interconnects. Cascading these smart-pixel array chips permits direct transfer of two-dimensional data or images in parallel. We present laborato ry demonstrations of the system for digital image edge detection and digita l video motion estimation. We also analyze the performance of the system co mpared with that of conventional single-instruction-multiple-data processor s. (C) 1999 Optical Society of America.