PSPICE model of the power LDMOS transistor for radio frequency applications in the 1.8-2.2 GHz Band

In this paper. we propose a model for the LDMOS transistor used for power a mplification in the frequencies band 1.8-2.2 GHz dedicated to the mobile te lephony system Digital Cellular System (DCS). This model takes into account the behaviour of each internal region of the power structure. A new repres entation of the non-linear inter-electrode capacitances, drain-gate C-gd an d drain-source C-ds, is proposed. The obtained model is implemented in the circuit simulator PSPICE, which gives an overall evaluation of the transist or performances in the radio frequency Dower amplification mode. This model is mainly intended to the system designer. A study of the power amplificat ion in the SHF band at 2 GHz is performed. A good agreement between experim ental and simulation results is found.