The charge-transfer feedback-controlled split-path CMOS buffer

A nerv low-power high-speed CMOS buffer, called the charge-transfer feedbac k-controlled split-path (CFS) CMOS buffer, is proposed. By using the feedba ck-controlled split-path method, the short-circuit current of the output in verter is eliminated. Four additional MOS transistors are used as the charg e-transfer diodes, which fan transfer the charge stored in the split output -stage driver to the output node. Thus the propagation delay and power diss ipation of the CFS buffer are reduced. The HSPICE simulation results show t hat the power-delay product of the CFS CMOS buffer is a savings over 20% in comparison to a conventional CMOS tapper buffer at 100 MHz operation frequ ency.