If a circuit has been found to be faulty during design characterizatio
n before it is in high volume production, it may be useful to diagnose
the cause of the failure. If faults are identified and located, a cir
cuit can then be redesigned to be less sensitive to common failure mec
hanisms. Fault diagnosability analysis is an approach to enhancing the
diagnosabilty of a circuit. Whereas the design for diagnosability ens
ures that the test points are properly selected and the generation of
tests is considerably simplified, diagnosability analysis is used to l
ocate sections of a circuit having poor diagnosability. The informatio
n allows estimation of a circuit's diagnosability before the fault dia
gnosis is attempted. Hence any potential problem can be located early
on the design phase, allowing modifications to be introduced to improv
e the final diagnosability of the circuit. This paper presents a simpl
e diagnosability analysis process in which the diagnosability of a cir
cuit is measured from a graph that describes the circuit topology and
a given set of test points, and no circuit simulation is needed. Since
the graphical description of a circuit topology is not unique, the de
veloped diagnosability analysis will find a graph with the maximum dia
gnosability that the circuit can possibly achieve, and identify the co
mponents/sub-circuits with poor diagnosability. (C) 1998 John Wiley &
Sons, Ltd.