AN ANALYSIS OF THE RELATIONSHIP BETWEEN IDDQ TESTABILITY AND D-TYPE FLIP-FLOP STRUCTURE

This paper describes IDDQ testability for bridging faults in a variety of flip-flops. The flip-flop is a basic element of the sequential cir cuit and there are various structures even for the same type. In this paper, we use five kinds of master-slave D-type flip-flops as the circ uit under test. Target faults are two-line resistive bridging faults e xtracted from a circuit layout. A flip-flop with a deliberately introd uced bridging fault is simulated by the SPICE simulator. Simulation re sults show that IDDQ testing cannot detect faults existing at specific points in some flip-flops, and this problem depends on the flip-flop structure. However, IDDQ testing has high fault coverage (greater than or equal to 98%) compared with traditional logic testing. We also exa mine performances of fully IDDQ testable flip-flops.