0.5-MU-M CMOS CIRCUITS FOR DEMODULATION AND DECODING OF AN OFDM-BASEDDIGITAL TV SIGNAL CONFORMING TO THE EUROPEAN DVB-T STANDARD

In the contest of digital terrestrial TV based on the DVB-T standard, four 0.5-mu m CMOS IC's (IC1-IC4) are presented. ICI integrates an 8-K fast Fourier transform for orthogonal frequency division multiplexing demodulation, IC2 performs channel estimation/correction, and IC3 is a forward error corrector implementing a Viterbi and a Reed-Solomon de coder. IC4, which is based on a digital signal-processing core, perfor ms the synchronization tasks of the complete receiver. These four chip s have been designed and manufactured using a 0.5-mu m, 3.3-V, triple- metal CMOS process. Their global complexity is about 500 kgates of sta ndard cells and 1.5 Mbits of memory, which represents a total die area of 435 mm(2) in 0.5 mu m. The total power dissipation is about 3.5 W when working at nominal frequency.