A LOW-COST, 300-MHZ, RISC CPU WITH ATTACHED MEDIA PROCESSOR

Citation
S. Santhanam et al., A LOW-COST, 300-MHZ, RISC CPU WITH ATTACHED MEDIA PROCESSOR, IEEE journal of solid-state circuits, 33(11), 1998, pp. 1829-1839
Citations number
7
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00189200
Volume
33
Issue
11
Year of publication
1998
Pages
1829 - 1839
Database
ISI
SICI code
0018-9200(1998)33:11<1829:AL3RCW>2.0.ZU;2-B
Abstract
This paper describes the 300-MHz StrongARM 1500 microprocessor, which is capable of more than two billion 16-b operations per second. Starti ng with the original StrongARM 110 design, an attached media processor (AMP) has been integrated along with a synchronous DRAM memory contro ller and separate I/O bus. In addition, several enhancements have been made to the CPU and cache subsystem, and the chip has been shrunk fro m a 0.35-to a 0.28-mu m technology. The chip includes 3.3 million tran sistors and measures 60 mm(2). It dissipates less than 3 W at 300 MHz at 2.0-V internal, 3.3-V I/O, The chip supports dynamic clock frequenc y switching for reduced operating power during low performance demands . There are 333 separately conditioned clocks on the chip. For battery -powered applications, V-dd can be reduced to achieve <0.5 W operation at 150 MHz. The chip is pseudostatic and can support clock stop and q uiescent supply current testing. It implements the ARM V4 instruction set [1].