THERMAL-RESISTANCE ANALYSIS BY INDUCED TRANSIENT (TRAIT) METHOD FOR POWER ELECTRONIC DEVICES THERMAL CHARACTERIZATION - PART II - PRACTICE AND EXPERIMENTS

The TRAIT method for thermal characterization of electronic devices, w hose theory was exposed in PART I [1] for one-dimensional (1-D) struct ures, was here applied to systems having heat fluxes with three-dimens ional (3-D) dependence in order to demonstrate that the spatial resolu tion of the thermal resistance analysis is still qualitatively maintai ned in this type of structure too. The analytical procedure was first applied to simulated structures whose temperature transients and stead y-state fields were obtained by means of a finite-element thermal simu lation program, In these cases, the knowledge of the steady-state temp erature distribution allowed identifying the thermal physical domains which correspond to the cells of the calculated equivalent thermal cir cuit composed by resistances and capacitances, Furthermore, some exper iments on real electronic devices with purposely designed assembling s tructures were exposed and discussed, The samples were power-integrate d circuits with plastic packages mounted on various substrates and Sch ottky diodes in TO-3 packages. The experiments on both simulated and r eal devices demonstrated that TRAIT analysis, being able to recognize the localization of some induced defects, maintains its spatial resolu tion character, despite the large distortion of the thermal domains oc curring when the defects are close to the heat source.