A NOVEL SUPPLY AND PROCESS INDEPENDENT ECL-TO-CMOS LEVEL CONVERTER FOR VLSI SYSTEMS

This paper presents novel circuit schemes for the ECL-to-CMOS level co nversion in BiCMOS digital ICs. The proposed topologies show electrica l characteristics (delay time, duty cycle, output currents) independen t from the supply voltage and process variations. Thus, they are suita ble to be used with both 3.3 V and 5 V supplies and over a huge temper ature range. Moreover, their average current consumption is lower than 320 mu A while operating with a signal frequency higher than 120 MHz. The propagation delay time in the presence of the load of a minimum-s ized inverter ranges from 1 ns to 1.2 ns for the two different propose d solutions at room temperature, and varies less than 2% over the temp erature range 0 degrees to 70 degrees. A prototype of the proposed cel l has been integrated in a conventional 0.8 mu m BiCMOS technology and the measurements confirm the expected performance. (C) 1998 Elsevier Science Ltd. All rights reserved.