FAST OUT-OF-ORDER PROCESSOR SIMULATION USING MEMOIZATION

Citation
E. Schnarr et Jr. Larus, FAST OUT-OF-ORDER PROCESSOR SIMULATION USING MEMOIZATION, ACM SIGPLAN NOTICES, 33(11), 1998, pp. 283-294
Citations number
10
Categorie Soggetti
Computer Science Software Graphycs Programming","Computer Science Software Graphycs Programming
Journal title
Volume
33
Issue
11
Year of publication
1998
Supplement
S
Pages
283 - 294
Database
ISI
SICI code
Abstract
Our new out-of-order processor simulator; FastSim, uses two innovation s to speed up simulation 8-15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First, FastSim uses speculative direct -execution to accelerate the functional emulation of speculatively exe cuted program code. Second, it uses a variation on memoization - a wel l-known technique in programming language implementation - to cache mi croarchitecture states and the resulting simulator actions, and then ' 'fast forwards'' the simulation the next time a cached state is reache d. Fast-forwarding accelerates simulation by an order of magnitude, wh ile producing exactly the same, cycle-accurate result as conventional simulation.