LATERAL ETCHING AND FILLING OF HIGH-ASPECT-RATIO NANOMETER-SIZE CAVITIES FOR SILICON DEVICE STRUCTURES

e study a process technique involving SiO2 lateral etching coupled wit h amorphous Si (alpha-Si) are filling as a possible alternative to imp rove performance and lower costs for bipolar complementary metal-oxide semiconductor technologies. We investigated the lateral etching of ox ide layers with thicknesses between 50 and 2.5 nm confined between a S i substrate and a multilayer stack composed of polycrystalline Si, WSi x, and Si3N4. We found that the lateral etching of SiO2 proceeds even with the smallest thickness (2.5 nm) to create extremely small cavitie s. The etch extent (fixed time) dependence with SiO2 thickness suggest s that capillary action may be an important mechanism. Using standard amorphous Si deposition techniques, we refilled all the small cavities without void formation as witnessed from transmission electron microg raphs. [S0003-6951(98)01346-1].