PARALLELIZATION IN AN HPF LANGUAGE PROCESSOR

Citation
Y. Hayashi et al., PARALLELIZATION IN AN HPF LANGUAGE PROCESSOR, NEC research & development, 39(4), 1998, pp. 414-421
Citations number
6
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
ISSN journal
0547051X
Volume
39
Issue
4
Year of publication
1998
Pages
414 - 421
Database
ISI
SICI code
0547-051X(1998)39:4<414:PIAHLP>2.0.ZU;2-O
Abstract
We have developed an HPF (High Performance Fortran) language processor for SX-4 series, aimed at distributed memory multiprocessor systems. HPF is a de facto standard data-parallel language mainly aimed at dist ributed memory multiprocessor systems. HPF allows users to develop par allelized programsdby only specifying how to map data onto processors. The HPF compiler partitions computation among processors based on spe cified mapping information, and generates necessary data transfers. Th erefore, both how to map computation onto processors and how to achiev e high-speed data transfer are important for the efficient implementat ion of HPF compilers. This paper describes automatic parallelization a nd data transfer technology in NEC's HPF language processor. This pape r also discusses the utilization of shared memory parallelization and vectorization on SX-4 and SX-5 series.