4TH-ORDER CASCADE SC-SIGMA-DELTA MODULATORS - A COMPARATIVE-STUDY

Fourth-order cascade Sigma Delta modulators are very well suited for I C implementation using analog sampled-data circuits because of their r obust, Stable operation and their capability to achieve high resolutio n and wide bandwidth with moderate power consumption. However, their o ptimum realization requires careful consideration of their performance degradations due to the hardware nonidealities. This paper presents a comparative study of the influence of finite op-amp gain and capacito r mismatch on the performance of fourth-order cascade Sigma Delta modu lators realized by means of switched-capacitor circuits. It considers single-bit and multibit quantized and draws a number of comparative re marks validated by time-domain behavioral simulations.