1.3V SINGLE-STAGE CMOS OPAMP

Authors
LU GN SOU G
Citation
Gn. Lu et G. Sou, 1.3V SINGLE-STAGE CMOS OPAMP, Electronics Letters, 34(22), 1998, pp. 2073-2074
Citations number
7
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
34
Issue
22
Year of publication
1998
Pages
2073 - 2074
Database
ISI
SICI code
0013-5194(1998)34:22<2073:>2.0.ZU;2-5
Abstract
A low-voltage, single-stage opamp realised using a conventional CMOS p rocess is proposed. It was designed by using novel regulated-cascode t ransistors which have a lower output compliance voltage. A gain-enhanc ement active load has been built by using a bias-stabilising technique . It enables the opamp to achieve a DC gain of > 68 dB with a reductio n in supply voltage to similar to 1.3 V.