FAULT ANALYSIS FOR NETWORKS WITH CONCURRENT ERROR-DETECTION

Authors
BOLCHINI C SALICE F SCIUTO D
Citation
C. Bolchini et al., FAULT ANALYSIS FOR NETWORKS WITH CONCURRENT ERROR-DETECTION, IEEE design & test of computers, 15(4), 1998, pp. 66-74
Citations number
10
Categorie Soggetti
Computer Science Hardware & Architecture","Computer Science Hardware & Architecture
Journal title
IEEE design & test of computers → ACNP
ISSN journal
07407475
Volume
15
Issue
4
Year of publication
1998
Pages
66 - 74
Database
ISI
SICI code
0740-7475(1998)15:4<66:FAFNWC>2.0.ZU;2-3
Abstract
The authors propose an approach for fault analysis and simulation of n etworks designed ta have concurrent detection properties. The analysis characterizes all faults that may affect a device and determines the coverage, extracting test vectors and other parameters for evaluating device quality.