Xp. Chen et al., NEAR-OPTIMAL PARALLEL DISTRIBUTED DATA DETECTION FOR PAGE-ORIENTED OPTICAL MEMORIES, IEEE journal of selected topics in quantum electronics, 4(5), 1998, pp. 866-879
Volume optical storage systems suffer from numerous sources of noise a
nd interference, the effects of which can seriously degrade retrieved
data fidelity and produce unacceptable bit-error rates (BER's), We exa
mine the problem of reliable two-dimensional data retrieval in the con
text of recently developed soft-decision methods for iterative decodin
g. We describe a novel near-optimal algorithm in which each pixel on t
he page is treated as a starting point for a simple iterative procedur
e so that a highly parallel, locally connected, distributed computatio
nal model emerges whose operation is well suited to the page-oriented
memory (POM) interface format. We study the use of our two-dimensional
distributed data detection (2D(4)) algorithm with both incoherent (li
near) and coherent (nonlinear) finite-contrast POM channel models. We
present BER results obtained using the 2D4 algorithm and compare these
with three other typical methods [i.e., simple thresholding (THA), di
fferential encoding (DC) and the decision feedback Viterbi algorithm (
DFVA)]. The BER improvements are shown to have a direct impact on POM
storage capacity and density and this impact is quantified for the spe
cial case of holographic POM, In a Rayleigh resolved holographic POM s
ystem with infinite contrast, we find that 2D(4) offers capacity impro
vements of 84%, 56%, and 8% as compared with DC, THA, and DFVA respect
ively, with corresponding storage density gains of 85%, 26%, and 9%, I
n the case of finite contrast (C = 4), similar capacity improvements o
f 93%, 18%, and 4% produce similar density improvements of 98%, 21%, a
nd 6%, Implementational issues associated with the realization of this
new distributed detection algorithm are also discussed and parallel n
eural and focal plane strategies are considered, A 2 cm(2) lambda = 0.
1 mu m digital VLSI real estate budget will support a 600 x 600 pixel
2D(4) focal plane processor operating at 40 MHz with less than 1.7 W/c
m(2) power dissipation.